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x P-Channel Power MOS FET x DMOS Structure x Low On-State Resistance: 0.105 MAX x Ultra High-Speed Switching x SOP-8 Package s Applications q Notebook PCs q Cellular and portable phones q On-board power supplies q Li-ion battery systems s General Description The XP132A01A0SR is a P-Channel Power MOS FET with low on-state resistance and ultra high-speed switching characteristics. Because high-speed switching is possible, the IC can be efficiently set thereby saving energy. The small SOP-8 package makes high density mounting possible. s Features Low on-state resistance: Rds(on)=0.075(Vgs=-10V) Rds(on)=0.105(Vgs=-5.5V) Ultra high-speed switching Operational Voltage: -5.5V High density mounting: SOP-8 u s Pin Configuration S S S G 1 2 3 4 8 7 6 5 D D D D s Pin Assignment PIN NUMBER 1~3 4 5~8 PIN NAME S G D FUNCTION Source Gate Drain SOP-8 (TOP VIEW) s Equivalent Circuit 1 2 3 4 P-Channel MOS FET (1 device built-in) s Absolute Maximum Ratings PARAMETER SYMBOL Vdss Vgss Id Idp Idr Pd Tch Tstg RATINGS -30 20 -5 -15 -5 2.5 150 -55~150 Ta=25: UNITS V V A A A W : : 8 7 6 5 Drain-Source Voltage Gate-Source Voltage Drain Current (DC) Drain Current (Pulse) Reverse Drain Current Continuous Channel Power Dissipation (note) Channel Temperature Storage Temperature Note: When implemented on a glass epoxy PCB s Electrical Characteristics DC characteristics PARAMETER Drain Cut-off Current Gate-Source Leakage Current Gate-Source Cut-off Voltage Drain-Source On-state Resistance (note) Forward Transfer Admittance (note) Body Drain Diode Forward Voltage Note: Effective during pulse test. Ta=25: SYMBOL Idss Igss Vgs(off) Rds(on) Yfs Vf CONDITIONS Vds=-30V, Vgs=0V Vgs=20V, Vds=0V Id=-1mA, Vds=-10V Id=-3A, Vgs=-10V Id=-1A, Vgs=-5.5V Id=-3A, Vds=-10V If=-5A, Vgs=0V 5 -0.85 -1.1 MIN TYP MAX -10 10 -1.0 -2.5 0.075 0.105 UNITS A A V S V Dynamic characteristics PARAMETER Input Capacitance Output Capacitance Feedback Capacitance SYMBOL Ciss Coss Crss CONDITIONS Vds=-10V, Vgs=0V f=1MHz MIN TYP 780 560 200 MAX Ta=25: UNITS pF pF pF u Switching characteristics PARAMETER Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time SYMBOL td (on) tr td (off) tf Vgs=-5V, Id=-3A Vdd=-10V CONDITIONS MIN TYP 20 25 30 20 MAX Ta=25: UNITS ns ns ns ns Thermal characteristics PARAMETER Thermal Resistance (channel-surroundings) SYMBOL Rth (ch-a) CONDITIONS Implement on a glass epoxy resin PCB MIN TYP 50 MAX UNITS C/W Drain Current vs. Drain /Source Voltage Pulse Test, Ta=25: Drain Current vs. Gate/Source Voltage Pulse Test Drain Current:Id (A) Drain/Source Voltage:Vds (V) Drain Current:Id (A) Gate/Source Voltage:Vgs (V) Drain/Source On-State Resistance vs. Gate/Source Voltage Pulse Test, Ta=25: Drain/Source On-State Resistance vs. Drain Current Pulse Test, Ta=25: Drain/Source On-State Resistance :Rds (on) () Drain/Source On-State Resistance :Rds (on) () u Gate/Source Voltage:Vgs (V) Drain Current:Id (A) Drain/Source On-State Resistance vs. Ambient Temp. Pulse Test Gate/Source Cut Off Voltage Variance vs. Ambient Temp. Vds=-10V, Id=-1mA Ambient Temperature:Topr (:) Gate/Source Cut Off Voltage Variance :Vgs (off) Variance (V) Drain/Source On-State Resistance :Rds (on) () Ambient Temperature:Topr (:) Drain/Source Voltage vs. Capacitance Vgs=0V, f=1MHz Switching Time vs. Drain Current Vgs=-5V, Vdd -10V, PW=10sec. duty 1% Capacitance:Ciss, Coss, Crss (pF) Switching Time:t (ns) Drain/Source Voltage:Vds (V) Drain Current:Id (A) Gate/Source Voltage vs. Gate Charge Vds=-10V, Id=-5A Reverse Drain Current vs. Source/Drain Voltage Pulse Test u Gate/Source Voltage:Vgs (V) Reverse Drain Current:Id (A) Gate Charge:Qg (nc) Source/Drain Voltage:Vsd (V) Standardized Transition Thermal Resistance vs. Pulse Width Rth (ch-a)=50C/W, (Implemented on a glass epoxy PCB) Single Pulse Pulse Width:PW (sec) |
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